This thesis documents development and basic testing of an asymmetric FHSS network. Asymmetric in a way that the network HUB or master consumes a lot of power, while the peripherals or slaves consume as little power as possible. The basis of the network are simple GFSK transceivers CC1200 produced by TI. The intended bandwidth is an SRD band h1.1 commonly known as 868 MHz band. The controller MCUs used in this thesis are STM32F0 and STM32L0. Both are Cortex-M ARM processors produced by ST.
The created network enables the connection of input only peripherals with input response time of 400 ms, while keeping the cumulative current consumption of 4.27 ěA. Peripherals receiving in periodic intervals were also discussed. The principles explored in this thesis can be used with different transceivers, different modulations or different MCUs. Some of the measurements are specific for the used hardware, but the results should be easy to extrapolate to any platform of interest.
The thesis doesn?t discuss PCBs development or development of any hardware at all.
Anotace v angličtině
This thesis documents development and basic testing of an asymmetric FHSS network. Asymmetric in a way that the network HUB or master consumes a lot of power, while the peripherals or slaves consume as little power as possible. The basis of the network are simple GFSK transceivers CC1200 produced by TI. The intended bandwidth is an SRD band h1.1 commonly known as 868 MHz band. The controller MCUs used in this thesis are STM32F0 and STM32L0. Both are Cortex-M ARM processors produced by ST.
The created network enables the connection of input only peripherals with input response time of 400 ms, while keeping the cumulative current consumption of 4.27 ěA. Peripherals receiving in periodic intervals were also discussed. The principles explored in this thesis can be used with different transceivers, different modulations or different MCUs. Some of the measurements are specific for the used hardware, but the results should be easy to extrapolate to any platform of interest.
The thesis doesn?t discuss PCBs development or development of any hardware at all.
This thesis documents development and basic testing of an asymmetric FHSS network. Asymmetric in a way that the network HUB or master consumes a lot of power, while the peripherals or slaves consume as little power as possible. The basis of the network are simple GFSK transceivers CC1200 produced by TI. The intended bandwidth is an SRD band h1.1 commonly known as 868 MHz band. The controller MCUs used in this thesis are STM32F0 and STM32L0. Both are Cortex-M ARM processors produced by ST.
The created network enables the connection of input only peripherals with input response time of 400 ms, while keeping the cumulative current consumption of 4.27 ěA. Peripherals receiving in periodic intervals were also discussed. The principles explored in this thesis can be used with different transceivers, different modulations or different MCUs. Some of the measurements are specific for the used hardware, but the results should be easy to extrapolate to any platform of interest.
The thesis doesn?t discuss PCBs development or development of any hardware at all.
Anotace v angličtině
This thesis documents development and basic testing of an asymmetric FHSS network. Asymmetric in a way that the network HUB or master consumes a lot of power, while the peripherals or slaves consume as little power as possible. The basis of the network are simple GFSK transceivers CC1200 produced by TI. The intended bandwidth is an SRD band h1.1 commonly known as 868 MHz band. The controller MCUs used in this thesis are STM32F0 and STM32L0. Both are Cortex-M ARM processors produced by ST.
The created network enables the connection of input only peripherals with input response time of 400 ms, while keeping the cumulative current consumption of 4.27 ěA. Peripherals receiving in periodic intervals were also discussed. The principles explored in this thesis can be used with different transceivers, different modulations or different MCUs. Some of the measurements are specific for the used hardware, but the results should be easy to extrapolate to any platform of interest.
The thesis doesn?t discuss PCBs development or development of any hardware at all.
Design an FHSS algorithm satisfying following conditions
There are grid powered HUBs and battery powered peripherals
HUBs do not communicate with each other over the FHSS network
Response time from peripheral to the HUB must be less than 400 ms
Peripherals are monitored within 20 minutes
Basic modulation is GFSK on CC1200 transceiver at an SRD frequency band h1.1
Compare achieved parameters with a non-hopping solution
Zásady pro vypracování
Explore common FHSS technologies
Design an FHSS algorithm satisfying following conditions
There are grid powered HUBs and battery powered peripherals
HUBs do not communicate with each other over the FHSS network
Response time from peripheral to the HUB must be less than 400 ms
Peripherals are monitored within 20 minutes
Basic modulation is GFSK on CC1200 transceiver at an SRD frequency band h1.1
Compare achieved parameters with a non-hopping solution
Seznam doporučené literatury
\renewcommand{\labelenumi}{[\arabic{enumi}]}
Artem Dementyev, Steve Hodges, Stuart Taylor and Joshua Smith, Power Consumption Analysis of Bluetooth Low Energy, ZigBee and ANT Sensor Nodes in a Cyclic Sleep Scenario, 2013
William H. Press, Saul A. Teukolsky, William T. Vetterling, Brian P. Flannery, Numerical Recipes 3rd Edition: The Art of Scientific Computing, 2007, ISBN:978-0521880688
Seznam doporučené literatury
\renewcommand{\labelenumi}{[\arabic{enumi}]}
Artem Dementyev, Steve Hodges, Stuart Taylor and Joshua Smith, Power Consumption Analysis of Bluetooth Low Energy, ZigBee and ANT Sensor Nodes in a Cyclic Sleep Scenario, 2013
William H. Press, Saul A. Teukolsky, William T. Vetterling, Brian P. Flannery, Numerical Recipes 3rd Edition: The Art of Scientific Computing, 2007, ISBN:978-0521880688
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